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Slot 1 refers to the physical and electrical specification for the connector used by some of Intel's microprocessors, including the Pentium Pro, Celeron, Pentium II and the Pentium III. Both single and dual processor configurations were implemented.

Intel switched back to the traditional socket interface with Socket 370 in 1999.

General[edit]

With the introduction of the Pentium II CPU, the need for greater access for testing had made the transition from socket to slot necessary. Previously with the Pentium Pro, Intel had combined processor and cache dies in the same Socket 8 package. These were connected by a full-speed bus, resulting in significant performance benefits. Unfortunately, this method required that the two components be bonded together early in the production process, before testing was possible. As a result, a single, tiny flaw in either die made it necessary to discard the entire assembly, causing low production yield and high cost.^{[citation needed]}

Intel subsequently designed a circuit board where the CPU and cache remained closely integrated, but were mounted on a printed circuit board, called a Single-Edged Contact Cartridge (SECC). The CPU and cache could be tested separately, before final assembly into a package, reducing cost and making the CPU more attractive to markets other than that of high-end servers. These cards could also be easily plugged into a Slot 1, thereby eliminating the chance for pins of a typical CPU to be bent or broken when installing in a socket.

The form factor used for Slot 1 was a 5-inch-long, 242-contact edge connector named SC242. To prevent the cartridge from being inserted the wrong way, the slot was keyed to allow installation in only one direction. The SC242 was later used for AMD's Slot A as well, and while the two slots were identical mechanically, they were electrically incompatible. To discourage Slot A users from trying to install a Slot 1 CPU, the connector was rotated 180 degrees on Slot A motherboards.

With the new Slot 1, Intel added support for symmetric multiprocessing (SMP). A maximum of two Pentium II or Pentium III CPUs can be used in a dual slot motherboard. The Celeron does not have official SMP support.

There are also converter cards, known as Slotkets, which hold a Socket 8 so that a Pentium Pro CPU can be used with Slot 1 motherboards.^[2] These specific converters, however, are rare. Another kind of slotket allows using a Socket 370 CPU in a Slot 1. Many of these latter devices are equipped with own voltage regulator modules, in order to supply the new CPU with a lower core voltage, which the motherboard would not otherwise allow.

Form factors[edit]

The Single Edge Contact Cartridge, or 'SECC', was used at the beginning of the Slot 1-era for Pentium II CPUs. Inside the cartridge, the CPU itself is enclosed in a hybrid plastic and metal case. The back of the housing is plastic and has several markings on it: the name, 'Pentium II'; the Intel logo; a hologram; and the model number. The front consists of a black anodized aluminum plate, which is used to hold the CPU cooler. The SECC form is very solid, because the CPU itself is resting safely inside the case. As compared to socket-based CPUs, there are no pins that can be bent, and the CPU is less likely to be damaged by improper installation of a cooler.

Following SECC, the SEPP-form (Single Edge Processor Package) appeared on the market. It was designed for lower-priced Celeron CPUs. This form lacks a case entirely, consisting solely of the printed-circuit board holding the components.

A form factor called SECC2 was used for late Pentium II and Pentium III CPUs for Slot 1, which was created to accommodate the switch to flip chip packaging.^[3] Only the front plate was carried over, the coolers were now mounted straight to the PCB and exposed CPU die and are, as such, incompatible with SECC cartridges.

History[edit]

Historically, there are three platforms for the Intel P6-CPUs: Socket 8, Slot 1 and Socket 370.

Slot 1 is a successor to Socket 8. While the Socket 8 CPUs (Pentium Pro) directly had the L2-cache embedded into the CPU, it is located (outside of the core) on a circuit board shared with the core itself. The exception is later Slot 1 CPUs with the Coppermine core which have the L2-Cache embedded into the die.

In the beginning of 2000, while the Pentium-III-CPUs with FC-PGA-housing appeared, Slot 1 was slowly succeeded by Socket 370, after Intel had already offered Socket 370 and Slot 1 at the same time since the beginning of 1999. Socket 370 was initially made for the low-cost Celeron processors, while Slot 1 was thought of as a platform for the expensive Pentium II and early Pentium III models. Cache and core were both embedded into the die.

Slot 1 also obsoleted the old Socket 7, at least regarding Intel, as the standard platform for the home-user. After superseding the Intel P5Pentium MMX CPU, Intel completely left the Socket 7 market.

Chipsets and officially supported CPUs^[4][5][edit]

Intel 440FX ^[6][edit]

• Introduced in: May 6, 1996
• FSB: 66 MHz
• PIO/WDMA
• Supported RAM type: EDO-DRAM
• Supported CPUs:
  • Pentium II with 66 MHz FSB
  • Celeron (Covington, Mendocino)
• Used in both Socket 8 (Pentium Pro) and Slot 1 (Pentium II, early Celerons)
• Does not support AGP or SDRAM
• Allowed up to two CPUs for SMP

Intel 440LX ^[7][edit]

• Introduced in: August 27, 1997
• FSB: 66 MHz
• Supported RAM type: EDO-DRAM, SDRAM
• Supported CPUs: Pentium II, Celeron
• AGP 2× Mode
• UDMA/33
  • Pentium II with 66 MHz FSB
  • Celeron (Covington, Mendocino)
• Introduced support for AGP and SDRAM
• Allowed up to two CPUs for SMP

Intel 440EX ^[8][edit]

• Introduced in: April, 1998
• FSB: 66 MHz
• Supported RAM type: EDO-DRAM, SDRAM
• Supported CPUs: Pentium II, Celeron
• AGP 2× Mode
• UDMA/33
  • Pentium II with 66 MHz FSB
  • Celeron (Covington, Mendocino)
• Same specifications as 440LX, but memory support limited to 256MB and no SMP support.

Intel 440BX ^[9][edit]

• Introduced in: April 1998
• FSB: 66 and 100 MHz (some motherboards supported overclocking to 133 MHz, allowing usage of Socket 370 CPUs using a Slocket)
• AGP 2× Mode (max memory mapping 32 or 64 MB)
• UDMA/33
• Supported RAM types: SDRAM (PC66 and PC100, PC133 with overclocking) up to 4 DIMMs of 256 MB
• Supported CPUs:
  • Pentium II with 66 and 100 MHz FSB
  • Pentium III with 100 MHz FSB (133 with overclocking)
  • Celeron (Covington, Mendocino, Coppermine)
• Allowed up to two CPUs for SMP

Slot Coordinator Deutschland Program

Intel 440ZX[edit]

• Introduced in: November 1998
• FSB: 66 and 100 MHz (some motherboards supported overclocking to 133 MHz, allowing usage of Socket 370 CPUs using a Slocket)
• AGP 2× Mode
• UDMA/33
• Supported RAM types: SDRAM (PC66 and PC100, PC133 with overclocking)
• Supported CPUs:
  • Pentium II with 66 and 100 MHz FSB
  • Pentium III with 100 MHz FSB (133 with overclocking)
  • Celeron (Covington, Mendocino, Coppermine)

Intel 820/820E (Camino)[edit]

• Introduced in: November 1999
• FSB: 66, 100, and 133 MHz
• AGP 4× Mode
• UDMA/66 (i820), UDMA/100 (i820E)
• Supported RAM types: RDRAM, SDRAM (PC133)
• Supported CPUs: All Slot 1 CPUs
• Allowed up to two CPUs for SMP

Via Apollo Pro / Pro+[edit]

• Introduced in: May 1998 (Pro Plus: Dec 1998)
• FSB: 66, 100 MHz (some motherboards supported overclocking to 133 MHz, allowing usage of Socket 370 CPUs using a Slocket)
• AGP 2× Mode
• UDMA/33 (VT82C586B/VT82C596A), UDMA/66 (VT82C596B)
• Supported CPUs:
  • Pentium Pro with 66 MHz FSB
  • Pentium II with 66 and 100 MHz FSB
  • Pentium III with 100 MHz FSB (133 with overclocking)
  • Celeron (Covington, Mendocino, Coppermine)

Via Apollo Pro 133[edit]

• Introduced in: July 1999
• FSB: 66, 100, and 133 MHz
• AGP 2× Mode
• UDMA/33 (VT82C596A), UDMA/66 (VT82C596B/VT82C686A), UDMA/100 (VT82C686B)
• Supported CPUs: All Slot 1 CPUs

Via Apollo Pro 133A[edit]

• Introduced in: Oct 1999
• FSB: 66, 100, and 133 MHz
• AGP 4× Mode
• UDMA/66 (VT82C596B/VT82C686A), UDMA/100 (VT82C686B)
• Supported CPUs: All Slot 1 CPUs
• Allowed up to two CPUs for SMP

See also[edit]

References[edit]

1. ^'CPU Sockets Chart'. erols.com. Retrieved 2009-03-31.
2. ^'PPro on a BX?-Usenet Gateway'.
3. ^http://www.tomshardware.com/reviews/overclocking-special,94-2.html^{[dead link]}
4. ^List of Intel chipsets
5. ^List of VIA chipsets
6. ^Intel Corporation: 440FX PCIset Datasheet
7. ^Intel Corporation: 440LX AGPset Design Guide^{[permanent dead link]}
8. ^Intel Corporation: 440EX AGPset Design Guide
9. ^Intel Corporation: 440BX AGPset Design GuideArchived 2012-10-04 at the Wayback Machine

External links[edit]

• Intel's specifications for the SC242 connectors^{[permanent dead link]}

By Laurence Frost

Slot Coordinator Deutschland App

PARIS (Reuters) - Global aviation heavyweights led by airline body IATA are pushing to suspend airport slot access rules until October 2021, they said on Thursday, but will give some ground to budget carriers angered by measures they deem anti-competitive.

The draft proposal, first reported by Reuters, was issued jointly by IATA, airports body ACI and slot coordinator association WWACG. It would prolong the current suspension of rules requiring airlines to use 80% of their take-off and landing windows or else cede some to rivals.

Rules on the allocation of airport slots have big ramifications for airline competition and market access for low-cost carriers, which were making ever deeper inroads before the pandemic. The current waiver expires on March 31.

'We oppose the extension of slot waivers into summer 2021 because this will lead to fewer flights and higher fares for consumers,' a Ryanair spokeswoman said.

Slot Coordinator Deutschland Sign Up

'Legacy airlines at hub airports will have no incentives to operate flights,' she added. 'Slot waivers distort competition by preventing low-fare airlines from expanding while legacy carriers are able to reduce capacity and raise prices.'

The issue is increasingly divisive among airlines and airports, pitting budget carriers largely absent from IATA against the organisation's more traditional membership.

In a bid to address concerns, the proposal would restore the 'use-it-or-lose-it' principle during the northern summer but reduce the utilisation rate required to keep slots to 50%.

'All parties agree that the normal threshold (80:20) should be replaced by a lower threshold,' the draft document says. '(The) slot usage requirement threshold shall be set at 50:50.'

IATA said the plan was 'essential to preserve connectivity' until air traffic recovers. 'The existing slot rules were never designed to cope with a prolonged industry collapse,' it said in a statement.

The proposal would also allow incumbent carriers to sidestep the 50% rule on slots they return for temporary allocation to rivals by February - too late for schedule planning, competitors say.

It is unlikely to satisfy Ryanair or ultra-low cost peer Wizz Air.

'Wizz Air finds any attempt to extend the current slot waiver in full, partially or at lower thresholds totally unacceptable,' its Chief Executive Jozsef Varadi told Reuters. 'Wizz Air is not party to this effort which is harmful to consumers, societies, taxpayers and the general workforce.'

But easyJet, a longer-established budget carrier present at major European airports, said it 'views the IATA-led industry proposal as a good compromise.'

Governments will decide on any waiver extension and must balance competition with support for an industry brought to a near-standstill in long-haul and many regional markets.

A blueprint with sector-wide backing is nevertheless bound to influence the European Commission, U.S. Federal Aviation Administration and other regulators, experts say.

For incumbents, it offers 'protection for their slot portfolios in a season where demand is still likely to be too weak to justify operating full programmes,' aviation consultant John Strickland said.

'But low-cost carriers with aircraft available to begin new services will see this as providing insufficient flexibility,' he added, and the plan leaves some airports 'unable to accept new flight capacity while seeing revenues continue to haemorrhage.'

(Reporting by Laurence Frost; additional reporting by Sarah Young in London; Editing by Edmund Blair and Susan Fenton)